Wright Tool

<p>C. A prediction of staffing requirements</p>

Li & Fung customers include the likes of Disney and Levi Strauss, which have very diverse needs that require customized supply chains. This means Li & Fung must analyze and understand where to source, build and distribute, and it must utilize the right set of manufacturing and sourcing processes.

Previous generation precision, low power amps use quite a bit of power and don't offer the same precision level as the newer devices. The older LMV771 amplifier, for instance, has a 1 mV maximum offset voltage, compared to only a 150 μV maximum for the LMP7711, Verhoeven said.

Typically, the tradeoff for op amps is low current = low speed. We have the same fundamental tradeoffs as our competitors, but using VIP50, ours is still 10x faster than theirs,” Verhoeven said.

RTHP6161SZH-35PS2_Datasheet PDF

When comparing the older LMV821 with the new LMV651, the LMV651 is more than two times faster but it only uses one quarter of the supply current.

Additionally, the older process was limited in terms of applications with only a 5-V maximum supply voltage, compared to a 12-V supply voltage for the newer devices, which expands the applications to outside the portable arena, Verhoeven said.

The key attributes of the six devices that National is introducing using the VIP50 process are:

RTHP6161SZH-35PS2_Datasheet PDF

The LPV511 op amp and LPV7215 comparator tout excellent speed at a very low current — less than 1 μA. The LPV511 op amp, a 12-V device in an SC70 package offers a rail-to-rail input and output and only draws 880-nA current.

The LMV651 offers 12 MHz of bandwidth for only 110 μ A of supply current.

RTHP6161SZH-35PS2_Datasheet PDF

The LMV791 is a low noise device. We chose to use a CMOS input to drive the noise down to less than 6 nV at 1 kHz, while guaranteeing an input bias current of less than 0.5 pA,” Verhoeven said.

The LMP7701 and LMP7711 boast really good precision — 150 μV to 200 μV of offset maximum. Both parts use CMOS transistors on the frontto-rail input and output while still enabling 12-V operation.

This type of memory does provide the flexibility of placing Verilog memory anywhere in the full memory range. But we are assuming that most of the accesses will be localized within the Verilog memory range, and only sometimes we may cross this range.

It is indeed true that total memory usage during normal simulations is most likely to be within the total Verilog memory size, but what is the guarantee that accesses will be localized within the Verilog range?

Suppose a design might store Ethernet frames in external memory. The location where it stores the frame might be a function of destination address. In this case, frames arriving into the design with fairly random destination addresses will spread out (though sparsely) throughout the full memory range. The total memory usage is most likely to be less than total Verilog memory, but still dynamic memory will be used since all accesses might not be in Verilog address range.

What, then, is the solution? Well, the trick is to not force Verilog memory to have a fixed address range in total memory. The next section deals with such an approach.

4.2.3 Associative static and dynamic memory

More information can be secured by clicking here for the ISL6260B and here for the ISL6262. The ISL6260B is available in a 40-lead QFN standard or lead-free package and is priced at $3.80 each in 1k quantities. The ISL6262, in a 48-lead QFN package, is priced at $4 each. A large selection of power products is supported by Intersil’s iSim online design tool; see www.intersil.com/isim/. Application information is available at www.intersil.com/apps.

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