SolidRun

<p>Molex Fiber Optics (800) A1FIBER (213-4237) www.molex.com EETInfo No. 613</p>

Next, the team compiled shared FPGA libraries — one for each submodule, to be tested separately — and two shared libraries for the top level. These FPGAs are used to implement the RCCs. The Axis tools allow users to compile as either a shared library or as a separate compile. In some setups, users run both the Xcite compilation that maps the RTL design to RCC elements and the FPGA compilation every time a simulation is run. Since in our environment that would require a lot of compilation, we decided to use the separate compile technique, running the FPGA compiles once each night. During the daytime simulation runs, users then only compile the testbench and reference the precompiled FPGAs.

Insuring the integrity of the message to learn whether anyone has altered the data enroute;

Identifying and authenticating both the sender and receiver to be certain this is the person I expected to communicate with;

RN73H2ETTD6340C50_Datasheet PDF

Preventing repudiation, in which someone denies transmitting or receiving a communication).

To simply do encryption and decryption involves manipulation and calculation of extremely large and numerous matrix arithmetic calculations. Adding authentication of identity and making it difficult for a sender to repudiate a message requires the additional 2,048-bit modular arithmetic calculation of these same tables, while maintaining the integrity of the message in transit adds more than 512 thirty-two bit additions per 64-byte processed block of data. We are talking huge numbers, here,” said Ali. Very quickly, companies are finding that doing such functions in software using a general-purpose processor can very quickly bring a site to a total shutdown.”

A general-purpose processor like those used in a typical server VPN application capable of handling 1,000 nonsecure Web page requests per second, he said, can only handle some 15 or fewer secure requests. A firewall that can process 1,000 Mbits/second of normal traffic can handle only about 50 Mbits/s or less of secure data, a twentyfold reduction in throughput.

RN73H2ETTD6340C50_Datasheet PDF

Despite the huge computational load imposed by software add-ons for IPSec and SSL, said LVL7's Jotwani, in the aftermath of Sept. 11 customers are calling for more of them in their servers, routers and switches. Although these are only partial solutions in terms of breadth and limited in terms of performance, they see implementing software on top of their existing hardware as a good first step toward a more all-encompassing solution.”

Until recently, said Linley Gwennap, principal analyst for the Linley Group, Inc. (Mountain View, Calif.) and author of the recently published Guide to Security Processors, the initial hardware solutions were incredibly expensive and deployed only in key areas. For example, he said, six months ago the cost of a typical IPSec board-level solution for just one 2.5-Gbit/s OC-48 connection was about $70,000. With new solutions incorporating next-generation security processors, boards and line cards are now available offering comparable solutions for about $300,” he said. Given the large number of competitors in the market, I fully expect that prices will drop even further.”

RN73H2ETTD6340C50_Datasheet PDF

And with lower cost, such technology will proliferate farther out into the network infrastructure. As the costs come down, I think you will see corporations thinking more broadly in terms of their security, beyond just protecting their e-commerce and VPN portals,” said Ali. Eventually, costs will be such that it will be economically possible to incorporate a high level of security on each and every router and switch line card. With security coming essentially 'free' on each board, you will see the migration of such solutions out of the enterprises and at each end of a server-to-server or server-to-client connection into every node in the network,” he said.

Even before Sept. 11, the projections of market growth for both hardware and software solutions to security appeared optimistic. Before Sept. 11,” said Ali, I thought some of these projections were somewhat overstated. In the aftermath I think they will be right on, especially as appropriate hardware solutions become available.”

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Figure 5 shows the realized controller. A difference fromFigure 4 is that the circuit uses two adders to add up thesignal components, since only adders with two inputs are available.An adder with three inputs would be, in principle, possible.However, it is only needed if the signals have the same delay.

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