Avnet Memec has codeveloped an energy-harvesting evaluation platform with Energy Micro and Maxim Integrated Products.

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<p>Foursquare, which build tools so users can keep up with friend and discover what’s going on around them, has a community of 15 million people worldwide, and more than 1.5 billion total check-ins. Eventually, what foursquare — and others are working towards — is using technology and the data it generates to make people passively aware of what's going on around them without being on their phones all day,” said Dennis Crowley, foursquare' CEO.</p>

Avnet Memec has codeveloped an energy-harvesting evaluation platform with Energy Micro and Maxim Integrated Products.

According to a report by the Taipei Times, Micron will pay about $169 million total for the shares. The Taipei Times also reported that the deal would boost Micron's ownership stake in Inotera to 40 percent from 30 percent, surpassing Nanya, which will now hold 26 percent of the joint venture.

In the filing, Inotera said the issuance of shares through private placement with Micron would increase Inotera's net worth and improve its financial structure.

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There is no change in the board seat arrangement after the shareholding change, but Micron will take more 30-nm capacity, which is expected to improve Inotera's profitability,” the filing stated.

BARCELONA – In a surprise announcement the night before the Mobile World Congress opens here, Huawei Devices showed what it claims were the world's fastest handsets and tablets, using a new quad-core applications processor designed by its chip division. Huawei said its K3V2 chip significantly outperforms the competition, including Nvidia’s quad-core Tegra3.

The 1.2-1.5 GHz K3V2 was a two-year project of Huawei’s HiSilicon division . Officials said the chip delivers 30 to 50 percent more performance than the Tegra3 across a range of benchmarks.

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A 64-bit memory bus–twice the width of the Tegra3–is one of the main factors in the performance of the K3V2, said Jerry Su, chief architect of the chip. Built in a TSMC 40 nm low power process, the chip fits in a 12x12mm package. Su said Huawei is willing to sell the chip as a merchant part to other handset makers.

The K3V2 uses four ARM Cortex A9 cores and a 16-core graphics block co-developed with an unnamed U.S. chip designer. The two collaborated on the GPU’s architecture, and the U.S. partner handled its implementation.

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The graphics block handles 2-D and 3-D work and helps a handset deliver 35 frames/second video compared to 13 fps for Tegra 3 and 8.4 for a dual-core Qualcomm Snapdragon, according to Huawei's tests.

In addition, the chip sports new versions of several existing Huawei hardware accelerators. They include blocks to speed up audio, video, network processing and to handle power management functions.

We are delighted to announce the addition of TI's KeyStone II support to the 6WINDGate packet processing software,” said Eric Carmes, CEO of 6WIND. Because it addresses critical issues in network bandwidth, scalability and Quality-of-Service, 6WINDGate has been adopted by multiple tier-one TEMs and is now deployed in two-thirds of the LTE networks worldwide. Our recently announced 6WINDGate Cloud Edition solution extends these benefits to cloud infrastructure. We have worked closely with TI to implement optimized support for its KeyStone II multicore architecture within 6WINDGate and look forward to delivering high performance software solutions to TI's OEM customers.”

We're constantly looking for ways to push the envelope with our KeyStone II multicore processors,” said Ramesh Kumar, business manager, multicore processors, TI. No multicore architecture matches the performance, flexibility and power efficiency of KeyStone II and our collaboration with 6WIND gives our customers the software support they need to quickly and easily develop high performance applications.”

TI's scalable KeyStone II architecture includes support for both TMS320C66x digital signal processors (DSP) generation cores and multiple cache coherent quad ARM Cortex-A15 clusters, for a mixture of up to 32 DSP and RISC cores. The multicore architecture includes capacity expansion for SoC structural elements such as TeraNet, Multicore Navigator and Multicore Shared Memory Controller (MSMC). This expansion allows developers to fully utilize the capability of all processing elements, including ARM RISC cores, DSP cores and enhanced AccelerationPacs. RISC processing within KeyStone II has been significantly upgraded with the addition of quad ARM Cortex -A15 clusters, providing ultra-high performance at half the power consumption of traditional RISC cores.

Availability 6WINDGate support for TI's KeyStone II multicore processors will be available in the second half of 2012. For more information please visit www.6wind.com

About TI's KeyStone multicore architecture Texas Instruments' KeyStone multicore architecture offers developers a robust portfolio of high performance, low-power multicore devices. Unleashing breakthrough performance, the KeyStone architecture is the foundation upon which TI's new TMS320C66x DSP generation was developed. KeyStone differs from any other multicore architecture as it has the capacity to provide full processing capability to every core in a multicore device. KeyStone-based devices are optimized for high performance markets including wireless base stations, mission critical, test and automation, medical imaging and high performance computing. Learn more at www.ti.com/multicore

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The U.S. holds the leading position in the ICT industry, and when coupled with Huawei's long-term dedication to innovation in the U.S. market, the result is a strategic collaboration to develop a more diversified, balanced and healthier global ICT ecosystem,” Ms. Chen Lifang, senior corporate vice president of Huawei, in a statement.

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