<p>Content manipulation The technologies that support the functions carried out at the content origination” region of the ecosystem are diverse but highly interrelated. First of all, the content must be encoded, typically in a non-real time fashion, to ensure that it can be delivered to a plethora of device types. But there are also real-time functional considerations. The media stream must be transcoded, and in some cases advertising content must be inserted. In commercial environments that support the delivery of broadcast television content to a mobile device, support for the Digital Video Broadcast to a Handset (DVB-H) protocol must be performed, and it is typically performed here to ensure that the information is properly packaged for delivery. </p>

Part 1 (click here) is a discussion on spectral analysis that presents the need for data windowing as well as the effect of windowing functions in the time and frequency domain. Part 2 , which will be posted on February 11, 2009, presents the Cosine-Sum family of windowing functions available in WaveVision 5, the application of these windows, and an elementary discussion on the mathematics behind the calculation of performance metrics such as the SNR.

The project pursues a new and innovative approach that involves the simulation, evaluation and optimization of the expected EMC behavior of components at the early stage of chip development. In current practice, EMC measurement is carried out on finished components, followed by optimization through several design and production cycles. The new approach involves substantial cost and time advantages in product development.

AutoKom mainly focuses on improvements that can be realized through optimized chip design, even though this requires extensive considerations of the overall system and other peripheral components (boards, ICs, connectors, etc.).

C1812N332F1GSH_Datasheet PDF

A third and equally important aspect of the AutoKom project is cost economy. Cost projections of the automotive industry force semiconductor manufacturers to develop smaller structural dimensions for their products ” 180/90 nm today, and 65 nm, 45 nm or below expected soon ” to be able to compensate for cost pressure with ever increasing functional integration. Consequently, the concepts and techniques developed in the scope of AutoKom shall be laid out such that they can not only be used in discrete components but also in complex graphic and display processors of the latest technological generations.

2. EMC in Vehicles ” A Complex Issue

2.1. The Problems in More Detail

C1812N332F1GSH_Datasheet PDF

2.1.1 Bandwidth Requirements for Image Data Transfer in Vehicles

C1812N332F1GSH_Datasheet PDF

Vehicle equipment for navigation, central information display (CID), head-up display or rear-seat entertainment is based on displays with ever increasing resolution and thus demands higher bandwidths for image data transfer. Also, the use of fast, high-resolution cameras for driver assistance systems requires image data transfer at high bandwidth and minimum latency. Data compression is not an option in most applications that necessitate high image quality and detailedness.

The project to verify the first instruction (VEC4ADD) was completed in four days, including setup time, debugging multiple design bugs and achieving comprehensive proof. The second instruction used the same setup scripts as the first instruction, allowing the designers to immediately focus on debugging. They were able to find, fix and confirm nine bugs on the second instruction (VEC2ADD) in less than two days. By extrapolating these results, it could take five to seven weeks, depending on the number bugs found, to verify all 21 instructions. This compares to the four to six months the design team spent on previous designs using simulation-based methods.


The RTL verification methodology for graphics instructions using system models was a success, with SLEC finding 19 functional bugs. The methodology improved the quality of verification and reduced the debug cycle with short, concise counter examples. The bugs where caused by a variety of issues, including incorrect sign extension, missing clamping logic and initialization errors that would have led to reduced image quality, software workarounds or a re-spin of the chip.

Sequential Logic Equivalence Checking is a unique methodology that finds bugs missed by traditional verification methods. It can improve functional verification effectiveness without requiring additional testbenches or assertions, minimizing design risk by exhaustively verifying RTL implementations using system models.

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The analysis of these differences in implementation area, timing, and power attributes revealed that considering simple, single-cycle power numbers was misleading and even erroneous. Indeed, some implementations had the worst power consumption if we considered only one clock cycle and would have been abandoned if we did not consider the data arrival pattern and the potential use of power modes or power-down options.

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