## Precision Electronics Corporation Figure 5 shows a modified diode detector circuit that incorporates some temperature compensation. In this circuit, the temperature dependence of the diode voltage is compensated for by a second diode. So as the voltage drop across D1 increases with temperature, an identical voltage is maintained across D2. This keeps the voltage at the center of the resistor divider, which is used as an output, constant. Figure 6 shows the transfer function of this temperature-compensated circuit. To take a closer look at the improved linearity and temperature stability of this circuit, we can use linear regression to calculate the best straight line fit for these points–that is, an equation with the form

Vout = Slope x Vin + Intercept

Note that in order to make this calculation, it is necessary to convert power numbers in dBm to voltage (a voltage in/voltage out transfer function gives a nominally linear relationship). Using this ideal straight line, we can plot the linearity of the response over its dynamic range. In practical applications, we would like to calibrate the circuit at room temperature but not over temperature. Therefore, we calculate the error over temperature with respect to the best straight line, measured at room temperature. This gives us a good measure of the system-level precision of this solution.  Figure 6 shows that the temperature-compensated diode detector has good temperature stability at high power levels but still becomes less temperature stable and less linear at low input levels. It is important to note that the circuit's output cannot be loaded with any significant load resistance. At low temperatures, this circuit has an extremely high output impedance. In effect, anything less than a FET buffer amplifier will result in the temperature compensating algorithm's failing, giving performance similar to that in Figure. 4.

Diode detector circuits do not measure true RMS signal strength. So the output voltage from these detectors will change as a function of input signal crest factor, even as the input RMS signal strength stays constant (higher crest factor gives lower output voltage). However, in a system where the signals have a constant crest factor this may not matter as long as the detector has been correctly calibrated. So, for example, if a radio link uses just one modulation scheme (e.g., QPSK) accurate power measurements can be made. However, in systems with varying crest factors, such as a CDMA or WCDMA base stations, true RMS measurements become difficult. One solution is to use different lookup tables based upon the call loading in the base station (it is the call loading in a particular channel that alters the crest factor). This, however, requires calibration of the base station for every call loading scenario. The problem gets even worse in multicarrier systems where the crest factor of multiple carriers is changing independent of one another.

The automated testbench for the ARM946E-S compares the activities occurring in the ARM946E-S Verilog model with the activities predicted by an e reference model of the ARM946E-S (the system behavioral model).

The testbench is composed of a series of e modules that drive and monitor the Verilog model of the ARM946E-S (the design-under-test). These modules can be classified as generators, reference models, checkers, and coverage modules. The generators generate stimuli, which are applied to both the Verilog model and the reference model, then a system of checkers is used to compare the behaviors. Finally coverage modules tell us how well we are doing in both the generation and in the coverage of the Verilog design-under-test (see Figure 3).

The test-bench contains two generators, an ARM9E-S BFM (Bus Functional Model) and an AHB Memory Model. The BFM replaces a ARM9E-S core in the testbench and generates pseudo-random instructions and data activities. The AHB Memory model replaces external memory and generates pseudo-random AHB responses to external memory requests.

In order to make the BFM reusable to the extent possible, we divided it internally into the instruction generator and the instruction activity driver. The instruction generator produced ARM9E-S instructions, which were then converted and played out by the instruction activity driver.

The instruction generator didn't generate complete information about any instruction; instead, it generated just the minimum amount of information needed to create ARM9E-S bus activities. The information generated by the instruction generator only depended on the ARM Instruction Set Architecture (ISA).

Where:

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