<p>Despite their criticism, most members of theSVTC agree that the chip industry has made aneffort over the years to clean itself up.Clean-up efforts are under way throughoutSilicon Valley, and there has beenimprovement.</p>

Sun is essentially trying to do an operating system with Jini,” said Microsoft's Stork. You don't really need that.”

Dan Yee, member of the technical staff at Hewlett-Packard Co.'s workstation systems lab (Fort Collins), uses the Verisure code-coverage product from TransEDA Inc. (Los Gatos, Calif.). While not currently integrating external IP, he's facing a very similar problem-reusing portions of a design done by another group, for a project that's been canceled.

We have a new team leveraging this design, and a lot of people were not really familiar with the old design,” Yee said. We are also reusing portions of their test suite, and so the question was, how good is their test suite. We used code coverage and were able to see where the holes were, and to write some new tests.”

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While much of the methodology outlined in the Reuse Methodology Manual applies to the creation of soft” or synthesizable IP, two providers of layout migration tools-Sagantec and Rubicad-are claiming their tools can help make hard” IP portable. Both offer products that automate some aspects of migrating a layout from one process to another.

Sam George, director of Cadence's system-chip group, said his company has had mixed experiences with such products. We found the technology is useful, but it's not fully automated, so you really need to be careful,” George said.

Sanjay Jhan, senior vice president of marketing at Qualcomm Inc. (San Diego), has used the Lace product from Rubicad (San Jose) to migrate designs between processes. Qualcomm designs wireless systems-on-chip that include processor, DSP and analog cores.

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Can Lace make hard IP blocks reusable? Up to a point,” said Jhan. An ARM core can be migrated to a certain extent, but you still have to do verification for electrical issues.”

At Lucent Technologies' Microelectronics Group (Berkeley Heights, N.J.), engineering director C.T. Chen has used the Dream layout migration tool from Sagantec (Milpitas, Calif.). Chen said it cut migration time by a factor of two when moving from a 0.35-micron, three-layer metal process to a 0.25-micron, five-layer process. After Lucent designers added the extra layers, the tool changed transistor sizing automatically, he said.

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It got us maybe 80 percent there, and then we had to tweak it by hand,” said Dave Onimus, FPGA physical-design manager at Lucent.

Whether IP is hard or soft, there is a need to prototype in silicon early. Mark Scheitrum, group director for multimedia design services at Cadence, said rapid prototyping shows how the IP is supposed to operate, and allows for hardware/software integration before production silicon is available. Cadence has used several prototyping approaches, he said.

CE's order backlog is currently in excess of $6.06 million-the highest in the company's history, and representing growth of 105% over last year, according to CE.

The distributor has also hired four managers from the information-technology industry to oversee purchasing and sales activities in what it calls its IT business, which comprises Pentium processors, memory upgrades, disk drives, and other components that go into and around PCs, a company spokesman said. Lejeune estimates that the new IT business-CE's first foray into this high-volume arena, according to the spokesman-will generate an additional $12 million in annual sales.

Due to overcapacity in the electronic-component market, numerous independents have branched out into PC products over the past year. Examples are Real World, the American IC Exchange, and NECX, the latter selling PCs, peripherals, and software through its Web site (www.necxdirect.com).

Compaq Computer Corp. is putting the finishing touches on an electronic forecast and planning system that it expects will eliminate several long- standing supply-chain pro- blems and move the company closer to achieving its goal of a two-hour order-to-delivery time.

In February 1999, Compaq will begin using Manugistics Inc.'s Networks, an Internet-based collaboration system that will allow the PC maker to gather supplier information daily in real time, according to Everett G. Plante Jr., Compaq's director of worldwide planning systems. Compaq wants to replace weekly planning with daily planning, mirroring the daily production schedule at the company, he said.


Any complex system-on-chip design involving IP reuse needs to start with a very high-level view. Algorithmic and system-level architectural models should be developed well before hardware/software partitioning, most observers agree.

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