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PCOND = IRMS2 x RDSon(12)

If the output inductor ripple current is small, the RMS input current for apparent duty cycles of less than 1 can be calculated with the following equation;

IRMS=((IAVE*(1/DA–1))2 *DA + IAVE2 * (1 –DA))1/2(5)

TW-20-06-S-D-350-120_Datasheet PDF

Input capacitors are usually selected based on their ripple current and voltage ratings. A capacitor's ripple current rating is based upon its parasitic ESR (equivalent series resistance) which causes power dissipation, and its physical size which determines their ability to dissipate heat. Low ESR electrolytic, organic, or tantalum capacitors are commonly used at the input of a multiphase converter. Multiple capacitors are usually paralleled to provide a high enough ripple current rating.

Input Inductor

An input inductor is often needed to keep the converter's input ripple current from injecting noise into the input bus, or to prevent the converter from exceeding the slew rate capability of the AC-DC power supply during load transients. This can cause the input capacitor voltage to droop during load transients, possibly requiring an increase in the value of input capacitance. The inductor should be sized so that its impedance is large enough to limit AC current flow at the converters effective switching frequency or during it's response time to a load transient.

TW-20-06-S-D-350-120_Datasheet PDF

Output Inductor

The output inductor and capacitors form a filter that provides a near DC voltage to the load. For the buck topology, the output capacitors see a continuos flow of current from the inductors, resulting in a much lower requirement to handle ripple current than the input capacitors. Multiphase converters further reduce the output ripple current through cancellation. As the inductor current in one-phase ramps up, currents in the other phase(s) ramp down and provide a canceling of currents during part of the switching cycle. Figure 9 shows ripple current waveforms for a three phase 12V to 1.5V converter.

TW-20-06-S-D-350-120_Datasheet PDF

As the name states, LVDS involves low voltages. Voltage swings are only about 350 mV, compared to the 2.4-V swings required for TTL. This certainly reduces power consumption. But even more important, the edge rates are dramatically slower because of the reduced voltage swing. The result is the potential to clock data significantly faster, as long as noise and crosstalk can be minimized. The differential signaling is the magic for controlling noise.

Common-mode noise

By using two wires with opposite current/voltage swings instead of just one, as is done with conventional buses, common-mode noise can easily be rejected. Common-mode noise would appear equally on both wires. Because the receiver looks only at the difference in voltage levels, not their absolute values, this noise is rejected. In addition, less noise is radiated by these pairs since the opposite voltage levels tend to cancel out radiated emissions. Another benefit is that while a fast parallel bus may be limited to a few inches in length because of skew problems, a serial interconnect can go a couple of feet across a backplane and through backplane connectors, or even several meters through an appropriate cable.

LVDS does require two wires per signal instead of only one with traditional buses. However, because LVDS can go so much faster, fewer wires are actually required for a given bandwidth. In real applications, bandwidth can be tripled while reducing the number of wires by a factor of 3 compared to the technology LVDS is replacing. This translates into a performance boost while simultaneously saving cost in component size, pc-board layout and manufacturing costs, and in connector sizes.

The StarCore architecture provides code compatibility across the performance spectrum, unlike those of its competitors in the general-purpose programmable- DSP market, Texas Instruments Inc. and Analog Devices Inc., Brooks said.

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