<p>Micron said it will continue, restructure or repay all of KMT's debt as of closing, projected to approximate 37 billion yen ($325 million).</p>

Supporting Layer 1 to Layer 7 applications in local- and wide-area networks, the ClassiPI chip was originally developed by SwitchOn Networks, which was acquired by PMC-Sierra last September for $450 million in stock (see Sept. 26).

Actel has developed an intellectual property (IP) core that will put programmable logic blocks onto ASICs.

Actel's FPGA core marks the company's second foray into SRAM-based designs. The core comes as the result of Actel buying Prosys last year. A version based on the Gatefield flash-memory technology, which will give an embedded core the benefit of non-volatility, is expected to follow.


The rationale for developing FPGA IP is to reduce the risk of ASIC designers finding that they have to respin their designs if a key part of a specification alters and to make ASSPs more flexible.

Actel and another embedded-FPGA supplier Adaptive Silicon, the latter working with LSI Logic, have claimed that it is possible to mop up parts of a design that are likely to change using on-chip FPGA cores.

John East, president and CEO, said: What did I last see when I last looked at a board? RAM, processor, DSP and an FPGA. With SoC, it's a no-brainer that FPGA will be in there.”


Actel's Varicore uses a classic SRAM-based design with three-input lookup tables and registers in each cell with additional carry chains to speed up arithmetic operations.

The company aims to deliver the IP in the form of a GDS II physical-layout file in a range of layouts made up of regular tiles of logic cells. Yankin Tanurhan, director of embedded FPGA, said the company would customise layouts to deal with situations where the target ASIC does not have a square or rectangular space for the FPGA section.


The largest array, a 4×4 block, holds around 40000gate, according to Tanurhan. To try to reduce space on the die, he said Actel used a five-transistor memory cell instead of the usual six-transistor construction.

Generating a design for the Varicore involves either using a dedicated FPGA synthesis tool, using the appropriate libraries. For customers who want to stick with an ASIC flow, Actel has written a netlist mapper that converts an existing netlist into a bitstream that can be used to program the FPGA core.

Meanwhile, the EMS company adds support to deal with new business, and that support is costed into the product. The result is a savings in labor and materials that is reduced by a doubling of support costs when the two organizations are viewed as one entity.

Craig Gates is executive vice president of engineering, marketing, and sales at Key Tronic Corp., a Spokane, Wash., EMS company. Send comments to

TOKYO — In an attempt to promote 1-bit audio signal-processing technology, which is hailed as the format that will bring high-fidelity sound to next-generation systems, Sharp Corp., Pioneer Corp. and Waseda University formed the 1-bit Audio Consortium this week (Feb. 13).

The new technology is capable of processing video and data signals as well as audio. With it, high-quality data can be sent over a network, stored and amplified. This technology also forms the core of Sony and Philips' proposed SuperAudio CD format.

In recognition of the technology's potential, most audio vendors in Japan, including Sony, Kenwood Corp. and Yamaha Corp., have signed on as supporters, as have several chip manufacturers and a university. The consortium now consists of 26 members, including the founding partners.

TOKYO–Toshiba Corp. here has licensed 32-bit processor technology from MIPS Technologies Inc. for new chip products in high-volume digital consumer and automotive applications.

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